Code No: C7009
JAWAHARLAL NEHRU TECHNOLOGICAL
UNIVERSITY HYDERABAD
M.TECH I SEMESTER EXAMINATIONS
APRIL/MAY-2012
ADVANCED COMPUTER ARCHITECTURE
(ELECTRONICS AND COMMUNICATION
ENGINEERING)
Time: 3hours Max.Marks:60
Answer any five questions
All questions carry equal marks
- - -
1.a) What is meant by addressing
mode? Discuss various addressing modes.
b) List the types of operands.
2.a) What is an instruction cycle?
Explain.
b) Give a note on RISC and CISC
controversy.
3.a) Discuss associate memory
organization.
b) Compare and contrast paging with
segmentation.
4.a) Explain interrupt driven I/O.
b) Describe the functionality of IO
processor.
5.a) Discuss the problems in parallel
processing.
b) Differentiate between horizontal
and vertical instruction formats.
6.a) Describe distributed shared
memory.
b) Explain the significance of RAID.
Briefly discuss its levels.
7. Discuss the practical issues in
interconnecting networks with suitable illustrations.
8.a) Explain the necessary hardware
support for more ILP at compile time.
b) Describe thread level parallelism
and synchronization.
* * * * * *
Code No: C3804, C6101, C0603, C7004, C6501
JAWAHARLAL NEHRU TECHNOLOGICAL
UNIVERSITY HYDERABAD
M.TECH I SEMESTER EXAMINATIONS
APRIL/MAY-2012
ADVANCED DATA COMMUNICATIONS
(COMMON TO DIGITAL ELECTRONICS AND
COMMUNICATION SYSTEMS, COMMUNICATION SYSTEMS, DIGITAL SYSTEMS AND COMPUTER
ELECTRONICS, ELECTRONICS AND COMMUNICATION ENGINEERING, WIRELESS AND MOBILE
COMMUNICATIONS)
Time: 3hours Max.Marks:60
Answer any five questions
All questions carry equal marks
- - -
1.a)
With suitable sketches, explain the operation of 8-PSK modulator and
demodulator. Compare bandwidth requirements of 8-PSK and 16 PSK systems.
b)
Explain squaring loop, costas loop and remodulator loop carrier recovery
circuits.
2.a)
Discuss and compare various LAN topologies.
b)
Explain Electrical, Mechanical and functional characteristics of EIA-232
interface standard.
3.a)
Encode the following message sequence using Hamming code.
11011001
b)
Determine the block check sequence (BCS) for the following data and CRC
polynomials
Data
G 75421()
CRC
Px 541()
4.a)
Explain and compare stop & wait and sliding window protocols.
b)
Describe HDLC frame format.
5.a)
Explain the operation of a single stage cross bar switch. What are its
limitations? How are they eliminated in multistage switches?
b)
Compare circuit switching and virtual circuit switching techniques.
6.a)
Describe the operation of Time division switches.
b)
Give the features of datagram switching.
7.a)
Explain CSMA/CD protocol and compare with ALOHA protocol.
b)
Describe the features of CDMA technique.
8.
Write a brief note on
a)
Time division multiplexing
b)
Asynchronous data link protocols.
* * * * * *
Code No: C9301
JAWAHARLAL NEHRU TECHNOLOGICAL
UNIVERSITY HYDERABAD
M.Tech I - Semester Examinations,
April/May-2012
ADVANCED DIGITAL SIGNAL PROCESSING
(SYSTEMS AND SIGNAL PROCESSING)
Time: 3hours Max. Marks: 60
Answer any five questions
All questions carry equal marks
- - -
1.a) Define DFT and IDFT.
b) Find the DFT of the given sequence
x(n) = {1,2,3,4}.
c) Plot the signals and their
corresponding spectra for rational sampling rate conversion by a) I/D = 5/3 and
b) I/D = 3/5. Assume that the spectra of input signal x(n) occupies the entire
range -π ≤ ωx
≤ π.
2.a) Explain the process of down
sampling the signal by a non-integer factor with a neat block diagram and
necessary expressions.
b) Explain the implementation of
Polyphase structure for Interpolators.
3.a) Prove that Periodogram is an
inconsistent estimate of power spectral density.
b) Compare Parametric and
Non-Parametric methods of power spectrum estimation.
4.a) Discuss AR, MA and ARMA models
of power spectrum estimation.
b) Discuss the method of power
spectrum estimation using Yule-walker method.
5.
Discuss how to solve normal equations using schur algorithm and also show that
it requires computations of order O(p) compared to Levinson algorithm which
requires computations of order O(p2)?
6.a)
Discuss the effects occur due to finite word length representation in Direct
form – I and II structures. w.r.to IIR filters.
b) Discuss the effect of quantization
of coefficients in FIR filters.
7. Write short notes on
a) Blackman-Tukey method of power
spectrum estimation.
b) Design of Phase shifters.
8. Define the following terms with an
example.
i) Finite
Word length Effects
ii) Limit
Cycles.
iii)Truncation
Error
iv)
Round-off error
v) Dead
band effects
vi)Over-flow
error.
---oo0oo---
R09
Code No: C6105, C6505
JAWAHARLAL NEHRU TECHNOLOGICAL
UNIVERSITY HYDERABAD
M.TECH I SEMESTER EXAMINATIONS,
APRIL/MAY-2012
DETECTION AND ESTIMATION THEORY
(COMMON TO COMMUNICATION SYSTEMS,
WIRELESS & MOBILE COMMUNICATIONS)
Time: 3hours Max.Marks:60
Answer any five questions
All questions carry equal marks
- - -
1.a) What is meant by hypothesis?
b)
Explain about a simple Binary Hypothesis test using an example of a real time
application of radar.
2.a) Differentiate between periodic
random processes and vector random processes.
b) Write about spectral
decomposition.
3.a) Highlight the difference between
detection and estimation with examples.
b) In detail, discuss about detection
and estimation of signals affected by White
Gaussian
Noise using Maximum likelihood estimation.
4.a)
Discuss in detail about Neyman-Pearson criterion for radar detection of
constant amplitude signals.
b)
Write about minimum variance unbiased estimator and best linear unbiased
estimator.
5.a) What is Cramer - Rao lower
bound?
b) Discuss how a lower bound on the
mean square estimation error helps to obtain
tighter
lower bounds improving the SNR threshold prediction.
6.a) Write about non-random waveform
estimation.
b) Draw the block diagram of the
Kalman filter model and algorithm.
c) Write a brief summary of the
Kalman filter algorithm in four steps.
7.a) Explain the fundamental role of
optimum linear filters.
b) How Kalman-Bucy filters are
different from Kalman filters.
8. Write notes on the following:
(a)
Parameter (b) Parameterized PDF
(c)
Estimator (d) Estimate
(e) Bias
(f) Variance
*****
Code No: C0602, C7001, C5508, C7706, C4505, C6806, C5706,
C3801
JAWAHARLAL NEHRU TECHNOLOGICAL
UNIVERSITY HYDERABAD
M.Tech I - Semester Examinations,
April/May-2012
DIGITAL SYSTEM DESIGN
(Common To DIGITAL SYSTEMS &
COMPUTER ELECTRONICS, ELECTRONICS & COMMUNICATION ENGINEERING, EMBEDDED
SYSTEMS, EMBEDDED SYSTEMS & VLSI DESIGN, SYSTEMS & SIGNAL PROCESSING,
VLSI & EMBEDDED SYSTEMS, VLSI SYSTEM DESIGN, DIGITAL ELECTRONICS &
COMMUNICATION SYSTEMS)
Time: 3hours Max. Marks: 60
Answer any five questions
All questions carry equal marks
- - -
1.a)
Implement a bcd- to excess three code converter by ROM. Calculate the cross
point density of the implementation.
b) For a pla with the following
function
z1(x1x2x3) = x1: z2(x1x2x3) =
x1x2’+x1’x2: z3(x1x2x3) = x2’x3+x2x3’
show the
schematic diagram, show its ssr notation and draw nmos nor-nor implementation.
2.a) Explain the Boolean difference
method with an example.
b) A two level AND-OR circuit has
four AND gates feeding one OR gate.
The four AND
gates realize the product terms x1x3’x4, x2x4, x1’x3’x4’ and x1x2x3
respectively. Derive the a and b - tests for detecting multiple stuck at
faults.
3.a) Explain podem with an example.
b) Explain transition count testing
with an example.
4. Find the minimized PLA of the
following output Boolean function by a PLA minimizer.
f1 = (2,4,5,6,7,10,14,15): f2 =
(4,5,7,11,15)
5.a) Draw the portion of an ASM chart
that specify a conditional operation to increment register (r) during state t1
and transfer to state t2 if control inputs z and y are equal to 1 and 0
respectively.
b) Design an ASM chart for a serial
adder with accumulator and show the control block diagram.
6.
Explain the procedure of designing a fault detection experiment with the help
of an example.
|
7. Construct a fault-detection
experiment for the machine of the following table. That is entirely preset,
that is with no initial adaptation part. Ps
|
Ns, z
X = 0, x = 1
|
|
A
B
C
D
|
D,0 c,0
C,0 d,0
A,0 b,0
D,1 a,1
|
Code No: C3810, C7010
JAWAHARLAL NEHRU TECHNOLOGICAL
UNIVERSITY HYDERABAD
M.TECH I SEMESTER EXAMINATIONS APRIL/MAY-2012
EMBEDDED REAL TIME OPERATING SYSTEMS
(COMMON TO DIGITAL ELECTRONICS &
COMMUNICATION SYSTEMS, ELECTRONICS & COMMUNICATION ENGINEERING)
Time: 3hours Max.Marks:60
Answer any five questions
All questions carry equal marks
- - -
1.a) Write the commands used to
handle processes in Unix
b) Explain the directory structure in
Unix operating system.
2.a) Define release time jitter,
sporadic and resource graph. Give examples.
b) Explain the various resource
parameters of jobs in detail.
3.a) Describe the weighted
round-robin scheduling approach with example.
b) Briefly describe the greedy
scheduling approach for real time applications.
4.a) Describe the external interrupts
and Immediate interrupt service.
b) Explain the queue structure for
EDF scheduling approach.
5.a) Explain the memory management
tasks handled in Vxworks.
b) How concurrency is handled in
Vxworks using semaphores?
6.a) Describe the pipes and its usage
in interprocess communication.
b) Differentiate between the data and
temporal dependencies and its effects.
7.a) Discuss the phases of periodic
tasks in time services.
b) What is fixed priority scheduling?
Explain with example.
8. Write short notes on:
a) Hard and soft real time systems.
b) Offline and Online scheduling
mechanism.
* * * * * *
R09
Code No:
C3808, C0609, C7008
JAWAHARLAL NEHRU TECHNOLOGICAL
UNIVERSITY HYDERABAD
M.TECH I SEMESTER EXAMINATIONS
APRIL/MAY-2012
INTERNETWORKING
(COMMON TO DIGITAL ELECTRONICS &
COMMUNICATION SYSTEMS, DIGITAL SYSTEMS & COMPUTER ELECTRONICS, ELECTRONICS
& COMMUNICATION ENGINEERING)
Time: 3hours Max.Marks:60
Answer any five questions
All questions carry equal marks
- - -
1.a) Write about the Network level
Inter connection.
b) Draw the Internet Architecture and
explain.
c) Explain about the wireless LANs.
2.a) What is Sub-netting and Super
netting?
b) Clearly explain about the
Delivery, Forwarding, and Routing of IP packets.
3.a) Explain about the fragmentation
and IPV.6.
b) Explain about the flow control in
transmission control protocol.
4.a) What are the SCTP services and
features?
b) Explain about the addressing in
Mobile IP.
5.a) Explain about the Link State
Routing.
b) Explain about the Path Vector
Routing.
6.a) What is Unicast and Multicast?
b) Explain about the DVMRP.
7.a) What is Name Space and Domain
Name Space?
b) Write about the Network Virtual
Terminal.
8.a) Explain about the Streaming
Stored Audio / Video.
b) Write about the Voice over IP.
c) Write about the Firewalls.
* * * * * *
Code No: C3806, C0604, C7006, C5501, C7701, C5701, C6801
JAWAHARLAL NEHRU TECHNOLOGICAL
UNIVERSITY HYDERABAD
M.TECH I - SEMESTER EXAMINATIONS,
APRIL/MAY-2012
MICROCONTROLLERS FOR EMBEDDED SYSTEM
DESIGN
(COMMON TO DIGITAL ELECTRONICS &
COMMUNICATION SYSTEMS, DIGITAL SYSTEMS & COMPUTER ELECTRONICS, ELECTRONICS
& COMMUNICATION ENGINEERING, EMBEDDED SYSTEMS, EMBEDDED SYSTEMS & VLSI
DESIGN, VLSI SYSTEM DESIGN, VLSI & EMBEDDED SYSTEMS)
Time: 3hours Max. Marks: 60
Answer any five questions
All questions carry equal marks
- - -
1.a) Explain
the hardware units and devices in an Embedded system.
b) Give the
classification of embedded systems.
2.a) Discuss
in detail the architecture of 8051 microcontroller.
b) Explain the
need for counters.
3. Discuss in
detail memory and I/O devices interfacing to the microcontroller.
4.a) Compare
Continuous timer blocks and Switched capacitor blocks.
b) Draw the
architecture of Programmable system-on-chip.
5.a) Explain
in detail the architecture of Embedded RISC processor.
b) Explain the
modes of operation of ARM processor.
6.a) Explain
the following terms:
i) Context switch
ii) Interrupt latency
b) Explain the
device drivers for internal programmable timing devices.
7. Describe
the following:
a) Serial communication protocols
b) SDMA
8. Write notes on the following:
a) Embedded software
b) I/O ports
c) Digital blocks.
* * * * * *
Code No: C7812
JAWAHARLAL NEHRU TECHNOLOGICAL
UNIVERSITY HYDERABAD
M.TECH I - SEMESTER EXAMINATIONS
APRIL/MAY 2012
SPEECH PROCESSING
(COMPUTER NETWORKS & INFORMATION
SECURITY)
Time:
3hours Max. Marks: 60
Answer any five questions
All questions carry equal marks
- - -
1.a) Define linear systems. Give an
example.
b)
Define filtering. Classify broadly. What kind of filtering is used in speech
processing?
c)
State the Fourier Transform relations. Explain the terms in it.
2.
List the application domains for time domain processing and frequency domain
processing in speech processing. Give a brief note about each.
3.
Explain how the sound units in Indian languages are classified based on manner
of articulation and based on place of articulation. Classify the sound units.
4.a)
What is meant by short-time speech analysis? How is it justified in speech
processing?
b)
Distinguish between wide-band spectrogram and narrow-band spectrogram. What are
the uses of each?
5.a)
Define formants. Why they are important in speech processing?
b)
What is the basic principle of LPC? Explain how LPC analysis is suitable for
speech processing.
6.a)
What is meant by cepstral analysis? How is it different from spectral analysis?
What are its applications?
b)
Explain what features are of important from the speech signal for speech
recognition applications.
7.a)
Explain how HMM is mathematically represented?
b)
Briefly explain the procedure for training HMM.
8.a)
Distinguish between speaker verification and speaker identification.
b)
Give a brief note about prosodic features. What is role in speaker recognition?
****
Code No: C0601, C5503, C7703, C6803, C5703, C7003, C4507,
C3803
JAWAHARLAL NEHRU TECHNOLOGICAL
UNIVERSITY HYDERABAD
M.TECH I SEMESTER EXAMINATIONS,
APRIL/MAY-2012
VLSI TECHNOLOGY AND DESIGN
(COMMON TO DIGITAL SYSTEMS &
COMPUTER ELECTRONICS, EMBEDDED SYSTEMS, EMBEDDED SYSTEMS & VLSI DESIGN,
VLSI & EMBEDDED SYSTEMS, VLSI SYSTEM DESIGN, ELECTRONICS &
COMMUNICATION ENGINEERING, SYSTEMS & SIGNAL PROCESSING, DIGITAL ELECTRONICS
& COMMUNICATION SYSTEMS)
Time:
3hours Max. Marks: 60
Answer any five questions
All questions carry equal marks
- - -
1.
Draw the circuits for n-MOS, p-MOS and C-MOS Inverter and explain about their
operation and compare them.
2.a) Explain about scalable Design
rules related to NMOS and CMOS Technologies.
b) What are the issues involved in
driving large capacitive loads in VLSI circuits? Explain.
3. Explain the following
a) Why is n-diffusion to p-diffusion
spacing is so large?
b) Why metal - metal spacing is
larger than ploy-ploy spacing?
c) What are the effects of scaling of
Vt?
4.a) Explain how to reduce the cross
talk by using ground wire to minimize cross talk.
b) Explain how fan-out and path delay
influences delay in combinational networks.
5.a) What are various floor planning
methods? Discuss in brief.
b) Explain the delay in combinational
logic network and how combinational delay can be reduced.
6.a) What are the various issues in
system-on-chip design? Explain it briefly.
b) Develop a sequence of tests for
the ‘01’ string recognizer which tests every combinational gate for both stuck
-at -0 and stuck -at-1 faults.
7.a) Explain how the extracting a
data path and controller from the ASM chart.
b) Explain how would you translate a
register transfer structure into a legal two phase latched sequential machine
give an example.
8.a) Explain the sequential testing
for testing a sequential machine and time-frame expansion of a sequential test.
b) Write short notes on Chip design
methodologies.
* * * * * *
